Is there a way to set the polygon to board outline clearance in the design rules? Altium has a rule for it, but in solidworks I can't find it. I'm using version 2019.1.
Hi, I do it like this:
- create a polygon from the board outline
- create the Keep-out layer from Board Shape (Create Primitives From Board Shape) and set a required width
Polygon is limited by the keep-out line width then.
Thanks for reply, I will try this.
But strange that they removed it from Altium for SW PCB.
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